1. Technical Field
Embodiments of the present disclosure generally relate to package technology, to electronic device packages having bumps, and methods of manufacturing the same.
2. Related Art
Electronic devices employed in electronic systems may include various circuit elements such as active elements and/or passive elements. The circuit elements may be integrated in and/or on a semiconductor substrate, thereby constituting the electronic device (also, referred to as a semiconductor chip or a semiconductor die). The electronic device may be mounted on a printed circuit board (PCB) or a package substrate to produce an electronic device package. The package substrate may include circuit interconnections such as silicon interposers. The electronic device package may be mounted on a main board to constitute the electronic systems, for example, computers, mobile systems, or data storage media.
Bumps are widely used in the fabrication of the electronic device packages. The bumps may electrically connect the electronic devices to the package substrates or may electrically connect the electronic devices to each other. For example, the bumps may be employed in flip chip packages to realize diverse stack structures of semiconductor chips and/or to increase the number of input/output terminals.
As the semiconductor chips having chip pads become more highly integrated, pitches and sizes of the chip pads have been gradually reduced and sizes of the bumps formed on the chip pads have also been reduced. In addition, the highly integrated semiconductor chips may lead to reduction of pitches and sizes of pads of package substrates, which are electrically connected to the bumps formed on the chip pads. Accordingly, contact areas between the fine bumps and the fine pads may be abruptly reduced.
Moreover, thin packages are increasingly in demand with the development of higher performance electronic systems. Thus, it may be necessary to reduce the thicknesses of the semiconductor chips, the package substrates and/or mold layers encapsulating the semiconductor chips. However, if the thicknesses of the semiconductor chips, the package substrates and/or mold layers encapsulating the semiconductor chips are reduced, the semiconductor chips and/or the package substrates may be more readily warped due to differences between coefficients of thermal expansion of the package substrates and the semiconductor chips. As a result, a physical stress applied to interfaces between the bumps and the pads may be increased to cause the bumps to peel from the pads. Accordingly, the reliability of the semiconductor packages (e.g., the electronic device packages) may be degraded.